Age | Commit message (Collapse) | Author |
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Signed-off-by: Jingdong Lu <jingdong.lu@windriver.com>
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fetch patch from
http://www.elinux.org/images/9/97/0001-omap4-pandaboard-fix-dvi-support.patch
this patch fixes some clock issues, provides a base 720p dvi panel
and adds the panda_dvi_defconfig for testing purposes.
Integrated-by: Jingdong Lu <jingdong.lu@windriver.com>
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commit b295d6e593e02168fdafc5db11464b6d51cf239d upstream
Adding DVI support to OMAP4 PandaBoard.
PandaBoard uses TFP410 DVI Framer chip
http://focus.ti.com/lit/ds/symlink/tfp410.pdf
The TFP410 gets its power enable and display data over GPIO lines muxed
in from OMAP4430. PandaBoard supports other LCD displays through
expansion
connectors, following board rework. This will disable the DVI interface.
However, the existing mux settings remain the same
PandaBoard additionally supports display over HDMI interface. It is
mutually exclusive to display over DVI. Hence the mux settings need to
be
configured seperately, as and when HDMI is enabled
Also, I2C3 bus used for reading EDID data from DVI Monitors is
registered here. Since the design is similar to BeagleBoard, the code
for the same is taken from the kernel.org commit e3333f48dd5cb21
(omap: Adding beagle i2c eeprom driver to read EDID)
Reviewed-by: Manjunath G Kondaiah <manjugk@ti.com>
Reviewed-by: Anand Gadiyar <gadiyar@ti.com>
Reviewed-by: Nishanth Menon <nm@ti.com>
Reviewed-by: Sumit Semwal <sumit.semwal@ti.com>
Signed-off-by: Raghuveer Murthy <raghuveer.murthy@ti.com>
[tomi.valkeinen@ti.com: fixed conflicts with HDMI]
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Integrated-by: Jingdong Lu <jingdong.lu@windriver.com>
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commit 2de110868f455b74e91111801ce63a3c9d06f091 upstream
Add dss.dpll4_m4_ck (DSS FCLK) initialization for OMAP4. This is used
to compute the pixel clock for DPI interface and also to reconfigure
the DSS FCLK to the desired rate, corresponding to the rate computed
for pixel clock.
Adding these cpu_is_44xx() checks are meant to be temporary, until a
cleaner implementation to manage these checks are added. Currently this
is needed to get DVI display running on OMAP4 PandaBoard
Signed-off-by: Raghuveer Murthy <raghuveer.murthy@ti.com>
[tomi.valkeinen@ti.com: minor changes due to conflicts]
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Integrated-by: Jingdong Lu <jingdong.lu@windriver.com>
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commit 0acf659f1469725fb6e39d53af970f36c5f69a41 upstream
OMAP2 does not have dpll4_m4_ck source clock for dss functional clock,
but later OMAPs do. Currently we check for cpu type in multiple places
to find out if dpll4_m4_ck is available.
This patch cleans up dss.c by using the fact that dss.dpll4_m4_ck
pointer is NULL on OMAP2. This allows us to remove many of the cpu
checks.
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Integrated-by: Jingdong Lu <jingdong.lu@windriver.com>
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commit 17c84ef1e1265fad787d4082bd40a63eb6f3eeb1 upstream
Adding board file structure for display which adds the display
structure with HDMI as the default driver when the display init
is called.
HDMI GPIO configurations are also done in this file.
Signed-off-by: Mythri P K <mythripk@ti.com>
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Integrated-by: Jingdong Lu <jingdong.lu@windriver.com>
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commit adbc2feee11aef2b3b0f4eff427d2ea5c211e798 upstream
calling the platform registration of HDMI driver from core
during initialization.
Signed-off-by: Mythri P K <mythripk@ti.com>
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Integrated-by: Jingdong Lu <jingdong.lu@windriver.com>
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commit 642e21bff200610b1d4c0e706d0a6b16ae4e25db upstream
Adding kconfig and makefile changes to add support for HDMI in OMAP4.
Signed-off-by: Mythri P K <mythripk@ti.com>
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Integrated-by: Jingdong Lu <jingdong.lu@windriver.com>
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commit 70be83235ea2815f6c2a5fd45753de406be6c6aa upstream
The panel driver(hdmi_omap4_panel.c) in omap2/dss acts as a controller
to manage the enable and disable requests and synchronize audio and video.
Signed-off-by: Mythri P K <mythripk@ti.com>
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Integrated-by: Jingdong Lu <jingdong.lu@windriver.com>
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commit c3198a5e83121d6e3d01816f15164f158f4301d8 upstream
Adding the hdmi interface driver(hdmi.c) to the dss driver. It configures
the audio and video portion of HDMI based on functionality called by the
panel driver.
Signed-off-by: Mythri P K <mythripk@ti.com>
Signed-off-by: Yong Zhi <y-zhi@ti.com>
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Integrated-by: Jingdong Lu <jingdong.lu@windriver.com>
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commit 26adeece88ffe172db7e26f856b576cccfb0ec85 upstream
Adding the hdmi interface driver header file (hdmi.h) to the dss driver.
Register and structure declaration done here.
Signed-off-by: Mythri P K <mythripk@ti.com>
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Integrated-by: Jingdong Lu <jingdong.lu@windriver.com>
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commit d3862610c95564a586951d5be291b9b0200d39fe upstream
Adding function to reset/set gamma table bit for TV interface, currently
only support for disabled is added.
Signed-off-by: Mythri P K <mythripk@ti.com>
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Integrated-by: Jingdong Lu <jingdong.lu@windriver.com>
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commit 7ed024aa280cb38c8aa5c188d2d2c98f5daede10 upstream
Adding function to select between HDMI or VENC clock source.
Signed-off-by: Mythri P K <mythripk@ti.com>
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Integrated-by: Jingdong Lu <jingdong.lu@windriver.com>
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commit b119601d4e226e42a067ff33116774d79dd9afbc upstream
Adding display type HDMI in dss_features, overlay and the manager so that
HDMI type of display will be recognized.
Signed-off-by: Mythri P K <mythripk@ti.com>
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Integrated-by: Jingdong Lu <jingdong.lu@windriver.com>
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commit d80d499ed926e70b429d309360f5910d5ad54788 upstream
print_irq_status functions can be called with empty irq status when full
irq debugging is enabled. This patch makes print_irq_status functions
return immediately when given an empty irq status to lessen the debug
spam slightly.
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Integrated-by: Jingdong Lu <jingdong.lu@windriver.com>
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commit 773b30b22f8c5ac4ccc52775c17809cc5826cb86 upstream
dsi_vc_send_bta_sync() waits for BTA interrupt with a 500ms timeout. If
a DSI error happens, no BTA is received and the timeout triggers. This
could be handled much faster by listening to DSI errors also.
This patch uses the ISR support to notice DSI errors while waiting for
the BTA, thus speeding up the fail-path considerably.
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Integrated-by: Jingdong Lu <jingdong.lu@windriver.com>
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commit f34bd465cae57bcce11fb7f953cfcbb18222b99e upstream
Remove bta_callback from the interrupt handler, and use ISR support
instead.
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Integrated-by: Jingdong Lu <jingdong.lu@windriver.com>
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commit f36a06e702ef804a99ce3a286514d84610a74db5 upstream
Remove bta_completion handling from the interrupt handler, and use ISR
support instead.
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Integrated-by: Jingdong Lu <jingdong.lu@windriver.com>
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commit 4ae2ddddf44cd9f73def2dbdb68c6859072262ff upstream
Add generic ISR support for DSI interrupts. ISRs can be used instead of
custom hooks in the interrupt handler.
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Integrated-by: Jingdong Lu <jingdong.lu@windriver.com>
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commit 69b281a61442f97e8df14babc9bb6a28624886b1 upstream
Clean up the IRQ handler a bit by separating collection of IRQ stats and
handling of IRQ errors to separate functions.
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Integrated-by: Jingdong Lu <jingdong.lu@windriver.com>
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commit 49641116392ad7522fa0efad53f7ed63f811bd88 upstream
The DSI PLL parameters (regm, regn, regm_dispc, regm_dsi, fint) have different
fields and also different Max values on OMAP3 and OMAP4. Use dss features to
calculate the register fields and min/max values based on current OMAP revision.
Signed-off-by: Archit Taneja <archit@ti.com>
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Integrated-by: Jingdong Lu <jingdong.lu@windriver.com>
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commit 31ef82377f1e0f1bc7d308ae4312e6cc5a431885 upstream
Create 2 functions dss_feat_get_param_min() and dss_feat_get_param_max() which
return the minimum and maximum value of a parameter. Introduce a enum in
dss_features called dss_range_param which contains parameters whose ranges we
are interested in.
Replace this with dss_feat_get_max_dss_fck() which is specific to the parameter
DSS_FCK.
Signed-off-by: Archit Taneja <archit@ti.com>
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Integrated-by: Jingdong Lu <jingdong.lu@windriver.com>
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commit 235e7dba0264d4c6e56ee217fc7ef6d80da5eb67 upstream
The structures dss_reg_field and dss_clk_source_name have enum members which
specify the register field and the clock source respectively. These members are
not used to choose the correct result in the corresponding feature functions.
Remove these members and change the features array declaration to incorporate
these enums.
The structure dss_clk_source_name without the enum member is just a pointer to
an string. Remove the structure and use a character pointer directly.
Signed-off-by: Archit Taneja <archit@ti.com>
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Integrated-by: Jingdong Lu <jingdong.lu@windriver.com>
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commit ba02fa37de80bea10d706f39f076dd848348320a upstream
Something seems to be wrong with OMAP4 & VENC, and register access fails
in omap_venchw_probe().
This patch skips venc driver registration on OMAP4, thus circumventing
the problem for now.
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Integrated-by: Jingdong Lu <jingdong.lu@windriver.com>
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commit 573efc2babf76422ebc5b373562a4c40d715b88e upstream
Use the mux framework to initialise the serial pads.
Signed-off-by: sricharan <r.sricharan@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Integrated-by: Jingdong Lu <jingdong.lu@windriver.com>
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commit 8aee6039465c9887af6a4babfa5b52f8bc96b43d upstream
Add macro for defining static pins in the board file.
We can now start implementing pin multiplexing in the platform init
code for devices that call omap_hwmod_mux_init. Currently that is
only implemented for serial.c.
Signed-off-by: Tony Lindgren <tony@atomide.com>
Integrated-by: Jingdong Lu <jingdong.lu@windriver.com>
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commit ea75159ee6f00bd809f57a58e5505dc362382cc8 upstream
On OMAP3, the pixel clock for the LCD manager was derived through DISPC_FCLK as:
Lcd Pixel clock = DISPC_FCLK / lcd / pcd
Where lcd and pcd are divisors in the DISPC_DIVISOR register.
On OMAP4, the pixel clocks for LCD1 and LCD2 managers are derived from 2 new
clocks named LCD1_CLK and LCD2_CLK. The pixel clocks are calculated as:
Lcd_o Pixel clock = LCDo_CLK / lcdo /pcdo, o = 1, 2
Where lcdo and pcdo registers are divisors in DISPC_DIVISORo registers.
LCD1_CLK and LCD2_CLK can have DSS_FCLK, and the M4 divider clocks of DSI1 PLL
and DSI2 PLL as clock sources respectively. Introduce functions to select and
get the clock source for these new clocks. Modify DISPC functions get the
correct lck and pck rates based on the clock source of these clocks. Since
OMAP2/3 don't have these clocks, force OMAP2/3 to always have the LCD_CLK source
as DSS_CLK_SRC_FCK by introducing a dss feature.
Introduce clock source names for OMAP4 and some register field changes in
DSS_CTRL on OMAP4.
Currently, LCD2_CLK can only have DSS_FCLK as its clock source as DSI2 PLL
functionality hasn't been introduced yet. BUG for now if DSI2 PLL is selected as
clock.
Signed-off-by: Archit Taneja <archit@ti.com>
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Integrated-by: Jingdong Lu <jingdong.lu@windriver.com>
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commit 66534e8e936a0b926863df90054dc59826d70528 upstream
Clean up some of the DSS functions which select/get clock sources, use switch
to select the clock source members since more clock sources will be introduced
later on.
Remove the use of macro CONFIG_OMAP2_DSS_DSI in dispc_fclk_rate, use a dummy
inline for function for dsi_get_pll_hsdiv_dispc_rate() instead for code clarity.
Signed-off-by: Archit Taneja <archit@ti.com>
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Integrated-by: Jingdong Lu <jingdong.lu@windriver.com>
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commit b9cb0984a6e6a09a4bcdc11ebc9f0eb71e5b6c85 upstream
Fix handling of error in omap_dispc_register_isr() in case there are no
free isr slots available.
Reported-by: Ben Tucker <btucker@mpcdata.com>
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Integrated-by: Jingdong Lu <jingdong.lu@windriver.com>
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commit 0cf35df353e8c36d4be0da2d7483896de599f397 upstream
Using dss_features to select independent core clock divider and setting
it. Added the register used, to DISPC context save and restore group
-----------------------------------------------------------------------
In OMAP4, the minimum DISPC_CORE_CLK required can be expressed as:
DISPC_CORE_CLK >= max(PCLK1*HSCALE1, PCLK2*HSCALE2, ...)
Where PCLKi is the pixel clock generated by MANAGERi and HSCALEi is the
maximum horizontal downscaling done through MANAGERi
Based on the usecase, core clk can be increased or decreased at runtime
to save power. Such mechanism are not yet implemented. Hence, we set the
core clock divisor to 1, to support maximum range of resolutions
------------------------------------------------------------------------
Signed-off-by: Raghuveer Murthy <raghuveer.murthy@ti.com>
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Integrated-by: Jingdong Lu <jingdong.lu@windriver.com>
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commit ce7fa5eb1e815e79e4dd5db42d0d1f8c9d96925b upstream
The OMAP4 DISPC_DIVISOR1 is backward compatible to OMAP3xxx DISPC_DIVISOR.
However DISPC_DIVISOR is also provided in OMAP4, to control DISPC_CORE_CLK
independent of Primary and Secondary display clocks.
Renamed DISPC_DIVISOR(ch) to DISPC_DIVISORo(ch), to facilitate introduction
of DISPC_DIVISOR register, which is specific for OMAP4. OMAP4 has 3 registers
DISPC_DIVISOR, DISPC_DIVISOR1 and DISPC_DIVISOR2.
Also updated, all the usages of DISPC_DIVISOR(ch) to DISPC_DIVISORo(ch).
Use DISPC_DIVISORo(ch) when DISPC_DIVISOR1 or DISPC_DIVISOR2 has to be
configured
OMAP4 TRM uses DISPC_DIVISORo generically to refer to DISPC_DIVISOR1 and
DISPC_DIVISOR2
Signed-off-by: Raghuveer Murthy <raghuveer.murthy@ti.com>
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Integrated-by: Jingdong Lu <jingdong.lu@windriver.com>
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commit 5c6366e14d9d4466ae34a1ccbc08dd8738909c1f upstream
In OMAP3xxx DISPC_DIVISOR register has a logical clock divisor (lcd_div)
field. The lcd_div is common, for deciding the DISPC core functional clock
frequency, and the final pixel clock frequency for LCD display.
In OMAP4, there are 2 LCD channels, hence two divisor registers, DISPC_DIVISOR1
and DISPC_DIVISOR2. Also, there is a third register DISPC_DIVISOR.
The DISPC_DIVISOR in OMAP4 is used to configure lcd_div exclusively for core
functional clock configuration. For pixel clock configuration of primary and
secondary LCDs, lcd_div of DISPC_DIVISOR1 and DISPC_DIVISOR2 are used
respectively
Signed-off-by: Archit Taneja <archit@ti.com>
Signed-off-by: Raghuveer Murthy <raghuveer.murthy@ti.com>
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Integrated-by: Jingdong Lu <jingdong.lu@windriver.com>
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commit 85604b0a247615157cedfec46b9cbfde2884f80f upstream
On omap4 the registers may not be accessible right after enabling the
clocks. At some point this will be handled by pm_runtime, but, for the
time begin, adding a small delay after clk_enable() should make things
work.
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Integrated-by: Jingdong Lu <jingdong.lu@windriver.com>
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commit f2988ab9f4a2bf5e24f37d20eab1aad6862953d3 upstream
When using OMAP2_DSS_USE_DSI_PLL, which selects DSI PLL as source clock
for DISPC, the DSI needs the vdds_dsi regulator. Latest regulator
changes broke this, causing the the code to not acquire the regulator
when using OMAP2_DSS_USE_DSI_PLL.
This patch acquires the vdds_dsi regulator in dsi_pll_init(), fixing the
issue. This is is just a quick hack to get the OMAP2_DSS_USE_DSI_PLL
option working. There shouldn't be any other downside in this solution
than some extra lines of code.
OMAP2_DSS_USE_DSI_PLL is itself a big hack, and should be removed, and
the feature itself should be implemented in a more sane way. However,
the solution is not trivial, and people are using DSI PLL to get more
exact pixel clocks, so this hack is an acceptable temporary solution for
the time being.
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Integrated-by: Jingdong Lu <jingdong.lu@windriver.com>
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commit bc6d4b1d3d9b7568fe88f5bb80d0266a7ef624cc upstream
Taal driver used to take a hard coded Macro for Virtual Channel and the VC_ID.
The Taal panel driver now requests for a Virtual channel through the
omap_dsi_request_vc() call in taal_probe().
The channel number returned by the request_vc() call is used for sending command
and data to the Panel. The DSI driver automatically configures the Virtual
Channel's source to either Video Port or L4 Slave port based on what the panel
driver is using it for.
The driver uses omap_dsi_release_vc() to free the VC specified by the panel.
taal_remove() or when a request_vc() call fails.
Signed-off-by: Archit Taneja <archit@ti.com>
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Integrated-by: Jingdong Lu <jingdong.lu@windriver.com>
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commit 5ee3c1445dd89342ca8498c14afef82d0f76c794 upstream
Introduce functions which request and release VC's. This will be used in panel
drivers in their probes.
omap_dsi_request_vc() takes in the pointer to the omap_dss_device, the VC_ID
parameter which goes into the header of the DSI packets, and returns a Virtual
channel number (or virtual channel register set) which it can use.
omap_dsi_set_vc_id() takes the omap_dss_device pointer, the Virtual Channel
number and the VC_ID that needs to be set for the specifed Virtual Channel.
omap_dsi_release_vc() takes the omap_dss_device pointer and the Virtual Channel
number that needs to be made free.
Initialisation of VC parameters is done in dsi_init().
Signed-off-by: Archit Taneja <archit@ti.com>
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Integrated-by: Jingdong Lu <jingdong.lu@windriver.com>
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commit 0a5835185420160f4fe8a6e1d1e42cd7efa07dc7 upstream
cpu_is_omapxxx() was used previously to select the supported interfaces.
Now that the interfaces are platform devices, we no longer need to do
the check when registering the driver. Thus we can just remove the
checks.
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Integrated-by: Jingdong Lu <jingdong.lu@windriver.com>
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commit 587b5e8269fab583e4e9d2d6bbdc77b289ac78a7 upstream
DPI and SDI are different from the other interfaces as they are not
hwmods and there is not platform driver for them. They could be said to
be a part of DSS or DISPC modules, although it's not a clear definition.
This patch moves DPI and SDI initialization into DSS platform driver,
making the code more consistent: omap_dss_probe() only initializes
platform drivers now.
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Integrated-by: Jingdong Lu <jingdong.lu@windriver.com>
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commit 277b2881c3c0d97e214487fbd677b0590fb4acf3 upstream
dpi_init() does not use the pdev argument for anything. Remove it.
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Integrated-by: Jingdong Lu <jingdong.lu@windriver.com>
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commit 42c9dee82129d965bc8ca02170150817317c0135 upstream
FB_OMAP_BOOTLOADER_INIT does not work, and it was only partially
implemented for SDI.
This patch removes support for FB_OMAP_BOOTLOADER_INIT to clean up the
code and to remove any assumptions that FB_OMAP_BOOTLOADER_INIT would
work.
Proper implementation is much more complex, requiring early boot time
register and clock handling to keep the DSS running.
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Integrated-by: Jingdong Lu <jingdong.lu@windriver.com>
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commit 1bb478350670fadf708d3cbd6137c32dfbe3fd5f upstream
DSI PLL output clock names have been made more generic. The clock name
describes what the source of the clock and what clock is used for. Some of
DSI PLL parameters like dividers and DSI PLL source have also been made more
generic.
dsi1_pll_fclk and dsi2_pll_fclk have been changed as dsi_pll_hsdiv_dispc_clk
and dsi_pll_hsdiv_dsi_clk respectively. Also, the hsdividers are now named
regm_dispc and regm_dsi instead of regm3 and regm4.
Functions and macros named on the basis of these clock names have also been
made generic.
Signed-off-by: Archit Taneja <archit@ti.com>
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Integrated-by: Jingdong Lu <jingdong.lu@windriver.com>
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commit 067a57e48e302863eb2d5ac0900ae9ae65dbc8c3 upstream
Clock source names vary across OMAP2/3 and OMAP4, the clock source enum
names have been made generic in the driver, but for purposes of debugging
and dumping clock sources, it is better to preserve the actual TRM name of
the clock.
Introduce a dss feature function 'dss_feat_get_clk_source_name()' which
returns a string with the TRM clock name for the current OMAP in use. The OMAP
specific name is printed along the generic name within brackets.
Signed-off-by: Archit Taneja <archit@ti.com>
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Integrated-by: Jingdong Lu <jingdong.lu@windriver.com>
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commit 88134fa138b90518819b750891ffecc13f5f4886 upstream
The enum members of 'dss_clk_source' have clock source names specific to
OMAP2/3. Change the names to more generic terms such that they now describe
where the clocks come from and what they are used for.
Also, change the enum member names to have "DSS_CLK_SRC" instead of "DSS_SRC"
for more clarity.
Signed-off-by: Archit Taneja <archit@ti.com>
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Integrated-by: Jingdong Lu <jingdong.lu@windriver.com>
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commit 819d807c59af10cce1dcbb13539c2fb100953fcd upstream
The maximum supported frequency for DSS has increased from 173 to 186 Mhz on
OMAP4.
Introduce a dss feature function to get the max_fck to replace DISPC_MAX_FCK
macro.
Signed-off-by: Archit Taneja <archit@ti.com>
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Integrated-by: Jingdong Lu <jingdong.lu@windriver.com>
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commit 87a7484b6a9ceaa9e7a9a238154b02ed4495f26a upstream
Add dss_features and register fields to incorporate changes in DISPC pipelines
between OMAP3 and OMAP4.
Register fields added: FEAT_REG_HORIZONTALACCU, FEAT_REG_VERTICALACCU
DSS Features added: FEAT_LINEBUFFERSPLIT, FEAT_ROWREPEATENABLE, FEAT_RESIZECONF
_dispc_set_scaling() and _dispc_set_rotation_attrs() have been cleaned up.
Signed-off-by: Archit Taneja <archit@ti.com>
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Integrated-by: Jingdong Lu <jingdong.lu@windriver.com>
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commit a1a0dccaea9e036200dc0b1070af1bfae06690fb upstream
hwmod databases provide information about which optional clocks are available
for a given platform. This is available via a function pointer opt_clock_enable
in pdata.
Use this information during get/enable/disable/put of clocks.
Signed-off-by: Sumit Semwal <sumit.semwal@ti.com>
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Integrated-by: Jingdong Lu <jingdong.lu@windriver.com>
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commit fd4b34f60736a20c5acd81cbb3083a0c60ae058e upstream
Provide a function in pdata to allow dss submodules to check if a given
clock is available on a platform as an optional clock.
Signed-off-by: Senthilvadivu Guruswamy <svadivu@ti.com>
(based on implementation from Senthil)
Signed-off-by: Sumit Semwal <sumit.semwal@ti.com>
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Integrated-by: Jingdong Lu <jingdong.lu@windriver.com>
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commit 4b6b7fa2d3677d1d86780c73fe2284147713e3b1 upstream
dsi_reset_tx_fifo() was not used. Furthermore, OMAP errata states that
TX FIFO flush is not functional, so the function wouldn't even have
worked.
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Integrated-by: Jingdong Lu <jingdong.lu@windriver.com>
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commit 4a0ab8df3e35da4d12df0631b2daae683dafe46c upstream
There was an unused list defined in display.c. Remove it.
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Integrated-by: Jingdong Lu <jingdong.lu@windriver.com>
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commit 6ec549e50b192105ede7bb289a31da6f6e1a61e9 upstream
Only OMAP 3430 hardware has SDI support. The availability of SDI HW can
be found out by checking if the LCD channel supports SDI displays.
This patch checks for SDI HW support before accessing SDI registers,
which fixes a crash on OMAP4 when SDI SW support is compiled in.
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Integrated-by: Jingdong Lu <jingdong.lu@windriver.com>
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